Postdoctoral Appointee, Advanced CMOS Product and Design - Onsite

Postdoctoral Appointee, Advanced CMOS Product and Design - Onsite

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What Your Job Will Be Like:

The Advanced CMOS Product and Design group is seeking a Postdoctoral Appointee to advance radiation‑hardened analog and mixed‑signal integrated circuit (IC) design in state‑of‑the‑art foundry process technologies, with an emphasis on Intel 18A/18A-P class (Intel 18AP) nodes and other advanced platforms. The successful candidate will contribute to the end‑to‑end development of RHBD circuits from architecture and transistor‑level design through physical implementation and verification while collaborating closely with experts in radiation effects, device physics, modeling, packaging, test, and system applications.

This role focuses on enabling next‑generation, radiation‑tolerant microelectronics for national security missions by developing circuit techniques and design methodologies that maintain performance in the presence of TID, SEE (SET/SEU/SEL), and variability, and by maturing these designs toward silicon demonstration. In this position, you will have opportunities to lead technical contributions, publish results, and engage with external partners as appropriate.

Develop radiation‑hardened‑by‑design analog/mixed‑signal circuits (e.g., front ends, references/biasing, regulators, clocks/PLLs, data converters, sensor interfaces, or other mission‑relevant macros) in advanced CMOS technologies.

Perform transistor‑level design, simulation, and optimization using industry‑standard EDA tools (SPICE‑class simulation, mixed‑signal verification, and signoff‑quality flows).

Implement layouts and/or oversee physical design activities, including layout‑aware design, DRC/LVS, parasitic extraction, EM/IR, and reliability signoff consistent with advanced‑node constraints.

Apply and evaluate RHBD techniques against TID and SEE susceptibility, including upset mitigation strategies, SET‑tolerant analog design practices, and robustness to process/voltage/temperature corners.

Work with radiation‑effects subject matter experts to define test structures, radiation characterization plans, and interpretation of radiation test data to improve circuit designs and design rules.

Collaborate with multi‑disciplinary teams on PDK enablement, model validation, design kits, and methodology development to support RHBD design in Intel 18AP‑class nodes.

Support prototype bring‑up, debug, and characterization, including bench measurements and correlation to simulation (directly or through close partnership with test engineers).

Communicate results through technical reports, publications, program reviews, and conference presentations, and contribute to proposal and roadmap…