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Analog​/Mixed-Signal DV Engineer — SystemVerilog & UVM

Job in Oregon, Dane County, Wisconsin, 53575, USA
Listing for: Itlearn360
Full Time position
Listed on 2026-07-14
Job specializations:
  • Engineering
    Electronics Engineer, Test Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 130000 USD Yearly USD 90000.00 130000.00 YEAR
Job Description & How to Apply Below

Axiom Software Solutions Limited in Oregon is seeking an Analog/Mixed-Signal Design Verification Engineer to develop and verify AMS models and test benches.

You will extract specifications, build System Verilog models, implement UVM test benches, and collaborate with circuit and layout engineers to meet functional requirements. This role requires strong knowledge of System Verilog RTL, Verilog-A for analog controls, and ability to work across multiple clock domains while maintaining timing integrity.

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