CPU RTL Design Engineer

Responsibilities

• Design and optimize logic structures, register transfer level (RTL) coding, and simulation for CPU development.
• Collaborate on defining architecture and microarchitecture features of CPU designs, ensuring alignment with power, performance, and area goals.
• Apply logic optimization strategies to meet timing, power, and design integrity requirements.
• Document microarchitectural specifications (MAS) for the CPU features being designed.
• Work closely with SoC customers to facilitate high-quality integration and functionality of the CPU IP block.

• Bachelor's degree in electrical engineering, computer engineering, or computer science with 6+ years of experience; OR Master's degree with 4+ years of experience; OR PhD with 2+ years of experience.
• Proficiency in RTL design using Verilog, V2K, or System Verilog, with extensive knowledge of hardware modeling and logic debug environments.
• Demonstrated expertise in energy-efficient and low-power logic design, including techniques for high-frequency optimization.
• Hands‑on experience with static timing analysis, cross‑clock domain crossings, UPF, and lint checks.
• Scripting proficiency in languages such as Python, Perl, or TCL.