Mixed Signal Design Verification Engineer
Job in
Oregon, Dane County, Wisconsin, 53575, USA
Listed on 2026-09-07
Listing for:
Jobtailor
Full Time
position Listed on 2026-09-07
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer, Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
- Perform functional verification of mixed signal logic components, including analog behavioral modeling
- Develop IP verification plans, test benches, and verification environments for mixed signal microarchitecture specifications
- Execute verification plans and define and run system simulation models to verify designs, analyze power and timing, and uncover bugs
- Replicate, root-cause, and debug issues in the presilicon environment
- Implement corrective measures to resolve failing tests
- Collaborate with digital and analog architects, RTL developers, and physical design teams
- Improve verification of complex architectural and microarchitectural features and meet functional, performance, and power goals
- Document test plans and drive technical reviews with design and architecture teams
- Maintain and improve functional verification infrastructure and methodology
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience, or Master's Degree in those fields with 2+ years of experience
- Digital logic experience
- VHDL/Verilog/System Verilog experience
- Testbench component development, preferably in OVM/UVM
- Design debugging skills
- Relevant experience may be obtained through schoolwork, classes, project work, internships, military training, and/or work experience
- Preferred: 7+ years of related experience
- Preferred:
Analog debug skills - Preferred:
Real number (current, voltage) simulation modeling and debug skills
Demonstrates expertise in functional verification of mixed signal logic components, including analog behavioral modeling and the development of IP verification plans. Proficient in VHDL, Verilog, and System Verilog, with strong skills in testbench development and design debugging.
Highest-signal resume keywords- Functional Verification
- VHDL/Verilog/System Verilog
- Testbench Development
- Design DebuggingLL
- Analog Debug Skills
- Mixed Signal Logic Components
- Analog Behavioral Modeling
- IP Verification Plans
- System Simulation Models
- Power Analysis
- Timing Analysis
- Root-Cause Analysis
- Corrective Measures Implementation
- Digital Logic Experience
- Real Number Simulation Modeling
- Collaboration
- Technical Review Leadership
- Electrical Engineering
- Computer Engineering
- Computer Science
- Presilicon Environment
- Microarchitecture Specifications
- OVM
- UVM
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