RTL Engineer

About Us: With offices in the U.S. and Germany, Micro Vision is at the forefront of driving the global adoption of innovative perception solutions, with the goal of making mobility and autonomy safer. Our engineering excellence, based in Florida, Washington State, Washington D.C., Hamburg, Germany and Orlando, FLorida, enables us to develop and supply integrated lidar hardware and perception software solutions.

Our proprietary technologies enhance safety and automation across various industrial applications, including robotics, automated warehouses, and agriculture, and are instrumental in the development of autonomous systems. Micro Vision’s core technology, initially developed for the automotive industry, continues to accelerate advanced driver-assistance systems (ADAS) and autonomous driving. Building on our history of providing technology to the military segment, our target offerings include semi- and fully autonomous airborne and terrestrial sensor systems.

With our solid-state lidar technologies, encompassing MEMS-based long-range lidar and flash-based short-range lidar, integrated with our onboard perception software, Micro Vision possesses the expertise to deliver safe mobility at the speed of life.

Job Summary: Micro Vision has an immediate opportunity for a Staff RTL Engineer. As a key member of Micro Vision's growing Digital Design Engineering team, you will collaborate with various technical teams in the company to design and take into production, market defining Automotive LiDAR product. The right candidate for this position will be a highly motivated FPGA/RTL Engineer with a breadth of understanding in FPGA design and best practices, including detailed design, System Verilog coding, modelling, simulation, verification, integration and test.

• Derive FPGA requirements based on system requirements then create FPGA architecture to fulfill those requirements
• Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements
• Own the detailed design of assigned firmware components and subsystem functionality
• Document test and implementation plans at unit and system levels and then execute on them
• Work with other teams to integrate developed features into system hardware
• Support bringing up RTL features developed by the team
• Coach/mentor junior members of RTL and integration teams to complete tasks
• Participate in the full software development life cycle (SDLC) flow including peer reviews of requirements, architecture, design, and code implementations within an approved ASPICE development flow

• Knowledge of System Verilog, Verilog, Python programming languages
• Proficient in FPGA Design methodologies from state machine design to DSP implementation
• Experienced in closing timing in FPGA designs
• Mapping algorithms to FPGA appropriate logic implementations
• Expert integrating and bringing up features in hardware
• Ability to work well in a fast-moving and complex environment
• Independently driven to complete project tasks
• Experience with Configuration Management and Change Control concepts and tools (Git, Subversion, Jira, etc.)
• Experience working with Functional Requirements and defining Requirement Based Tests
• Experience performing HDL Synthesis/Simulation (e.g., VCS, Synplicity, etc.)
• Experience with design analyses (Timing, Lint, Clock Domain Crossings, Code Coverage, etc.) and IP compliance strategies
• Experience designing portable, scalable Test Benches
• Experience with UVM/OVM – Constrained random testing
• Familiarity with hierarchical simulation and verification frameworks
• Experience with intersystem communication protocols (I2C, UART, SPI, etc.)
• Familiarity with microcontroller peripherals including one or more of the following: ADCs, DACs, Flash, EEPROM, timers and watchdogs
• Working knowledge of data structures and algorithm fundamentals
• Working knowledge of digital and analog electronics

• Knowledgeable of control systems and digital signal processing fundamentals
• Proficient in other embedded software systems developed in C/C++/etc.
• Hands‑on…