ASIC & FPGA Design Engineer Sr

Description:

You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team within Missiles & Fire Control (MFC). Our team delivers the digital heart beat that powers the Next Generation Short Range Interceptor (NGSRI), turning system level performance and safety goals into reliable, production ready FPGA hardware for the United States and allied forces.

What You Will Be Doing

As the senior ASIC & FPGA designer you will own the full lifecycle of the CLA FPGA-from high level architecture through release ready documentation-while mentoring junior talent and partnering with a broad set of cross functional experts. Your responsibilities will include:

* Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog/System Verilog that satisfies performance, power, and reliability targets.

* Developing synthesis, place and route, and timing closure strategies to guarantee deterministic operation on the chosen FPGA families.

* Building comprehensive test plans, simulation models, and verification environments (UVM, System

C, Python based test benches) to prove functional correctness and timing margins.

* Leading hardware in the loop (HIL) tests, board level debugging, and subsystem integration activities.

* Translating system level performance, safety, and reliability requirements into detailed FPGA architectures and resource utilization studies.

* Conducting timing analysis, power budgeting, and device selection optimization.

* Managing configuration control with Git Lab (or equivalent), maintaining version controlled repositories, and ensuring full traceability of all design artifacts.

* Producing complete design packages-specifications, test plans, verification reports, and release documentation-compliant with aerospace and Lockheed Martin command media standards.

* Collaborating with systems, software, hardware, mechanical, test, manufacturing, and quality teams to keep the program on schedule and within performance envelopes.

* Mentoring junior engineers, championing best practice FPGA development, verification, and configuration management processes.

Why Join Us

Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.

We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin's comprehensive benefits package here.

Further Information About This Opportunity:

This position is in Orlando. Discover more about our Orlando, Florida location.

MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance

Basic Qualifications:

* Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university;
Master's degree preferred

* Minimum 3 years of professional experience with FPGA design and simulation verification or a related discipline

* Proficiency in HDL programming with VHDL, Verilog, and/or System Verilog

* Experience with Xilinx/AMD toolsets (Vivado, Vitis, Vitis HLS) and Ultra Scale design methodology

* Experience with FPGA simulation tools such as Synopsys VCS

* Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity

* Experience with high-speed interfaces such as AXI, Ethernet, TCP/IP, PCIe, and serial protocols

* Practical laboratory debug experience with high-speed oscilloscopes, spectrum analyzers, and signal generators

* Familiarity with Synopsys EDA tools

* Must be a US Citizen; must possess or be able to obtain a DoD Secret clearance'

Desired

Skills:

* LM/MFC design experience and missile program experience

* Experience with System Verilog, Verilog, C/C++, MATLAB/Simulink;
Synopsys Synplify, Synopsys VCS, NCSim, Chip Scope tool sets

* Experience with Xilinx/AMD and…