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Senior ASIC RTL Design Engineer AI Accelerators

Job in Palo Alto, Santa Clara County, California, 94306, USA
Listing for: Tesla
Full Time position
Listed on 2026-02-25
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 264000 USD Yearly USD 120000.00 264000.00 YEAR
Job Description & How to Apply Below
Position: Senior ASIC RTL Design Engineer for AI Accelerators
A leading automotive and energy company is seeking a Senior ASIC RTL Design Engineer with a focus on AI hardware in Palo Alto, CA. The ideal candidate will have 5+ years of experience and expertise in high-performance RTL design techniques. Responsibilities include developing micro-architecture specifications, collaborating with cross-functional teams, and ensuring efficient design. The role offers a competitive salary range of $120,000 to $264,000 along with comprehensive benefits, making it an attractive opportunity for qualified candidates.
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Position Requirements
10+ Years work experience
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