ASIC Sales Director

Faraday believes people are the greatest asset and key success factor in a company. We create an inspiring workplace where each employee can contribute his/her expertise positively. It’s an important mission – delegating the right people in the right position and taking good care of them. Join us today for a rewarding and an exciting career future.

• MS plus 3 years or BS plus 6 years of minimum relevant experience or Ph.D in relevant fields.

• Receiver adaptation, channel simulation, IBIS model, SERDES protocol such as PCIe/USB/SATA/Ethernet/PON(OLT,ONU)

• Hands‑On Analog building block Design/layout & debug Experience
• Hands on experience in silicon test and debug
• Familiar with Ser Des system operation
• Familiar with Ser Des Architecture definition & System Modeling/analysis
• Familiar with Ser Des protocols such as PCIe, USB, SATA, 802.3 Ethernet..etc
• Basic Knowledge on hi-speed package, board design
• Familiar with both analog & mixed signal design flow & tools
• Familiar with Verilog, Verilog-A/AMS, Matlab
• Highly self‑disciplined and motivated with strong integrity

• Responsible for development of ASIC accounts on the Western Coast and Western Canada
• Daily tasks involve:
  • Identification and qualification of potential SOC/ASIC customers
  • Working with customer’s senior management in architecting marketable solutions for their system products
  • Creating solution proposals for customers
  • Facilitating exchange of technical materials between Application Engineers and customer’s technical staff
  • Select, train and manage teams of Manufacturer Representatives
  • Quarterly review and goal setting for representatives
  • Forecasting of NRE and mass production volume

• Pre‑sales:
  As an architecture and SoC solution consultant, work with sales to provide SoC/ASIC solution proposals and quotations to customers, and achieve design‑win
• Post design‑win:
  Work directly with customers to identify and eliminate roadblocks to successful tape‑out, including pre‑ and post‑layout design support, optimize speed, density, performance and power consumption
• Technical support and program management:
  As a liaison, collaborate with HQ and client engineers to successfully deliver design services and production services;
  Coordinate a multi‑site design team between Faraday and customer across US, Taiwan, and Asia Pacific
• Demand creation:
  As a technical marketer, collaborate with Sales to identify new application markets and provide total solution with leadership IPs in order to grow SoC design service business
• Application markets includes networking, communication, cloud servers, solid state storage, high performance computing, mobile electronics, low power technologies, automotive electronics, etc
• SoC Architectures including the integration of ARM Cortex family of CPUs, ARM based high speed bus, security IP (Trust Zone), On‑Chip Network bus topologies such as Arteris, Sonics and ARM NIC interconnects, memory data flow, peripheral interface standards, high speed serial interfaces, high speed transceiver / SERDES
• Supporting HQ and Facilitate continuous improvement of the design service flow based on customer feedback to improve customer satisfaction; provide feedback and suggestion to HQ to improve front end and back end design flow efficiency

• BSEE or MSEE with 7+ years of experience in SoC/ASIC related hardware engineering, application engineering, or design engineering
• Hardware or system experience in applications such as networking, communication, cloud servers, solid state storage, high performance computing, mobile electronics, low power technologies, automotive electronics, etc
• Knowledge of modern SoC architectures including, ARM CPU, high speed bus, memory data flow, peripheral interface standards, high speed serial interfaces, high speed transceiver / SERDES, familiar with modern RISC CPU ISA and micro‑architecture is a plus
• Ideal candidates would also have considerable experience integrating ARM Cortex family of CPUs, ARM based bus interconnects and ARM Security IP (Trust Zone). Experience with On‑Chip Network bus topologies such as Arteris,…