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Senior ASIC​/FPGA Design Engineer — Space & National Security

Job in Palo Alto, Santa Clara County, California, 94306, USA
Listing for: SPACE EXPLORATION TECHNOLOGIES CORP
Full Time position
Listed on 2026-07-03
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 170000 - 235000 USD Yearly USD 170000.00 235000.00 YEAR
Job Description & How to Apply Below
A leading aerospace company in Palo Alto is seeking a Sr. ASIC Design Engineer for the Starshield project, focusing on advanced technology for national security. Responsibilities include designing digital ASICs and collaborating with various teams. Ideal candidates have a Bachelor's degree in relevant fields and over 5 years of experience in RTL/FPGA development. The position offers a salary range of $170,000 to $235,000, along with comprehensive benefits including paid vacation and medical coverage.
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Position Requirements
10+ Years work experience
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