Silicon & Transceiver Validation Engineer

Cspeed IO is a stealth start up backed by Sutter Hills Ventures and Atreides Capital – headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category‑defining semiconductor and infrastructure businesses at companies like Broadcom, Lumentum, Tesla, Apple, Samsung, Intel, and VMware.

Cspeed IO is developing next‑generation optical semiconductor solutions for the AI infrastructure market, focused on enabling true “scale‑up” architectures. Our mission is to replace traditional copper interconnects with advanced fiber‑optic technologies that overcome the limitations of existing optics solutions and architectures.

We are seeking a Silicon & Transceiver Validation Engineer to drive validation of our high‑speed optical transceivers—from silicon characterization through module‑level testing to host‑system interoperability. You will review transceiver designs and requirements, develop comprehensive validation plans, and execute them in the lab across all major subsystems:
Ethernet Ser Des, internal data pipeline, laser and modulator control, mux/demux, and the MCU controller with EEPROM and I²C interfaces.

• Review transceiver architecture and specifications; develop validation plans covering silicon, module, and system‑level testing with defined coverage matrices and pass/fail criteria.
• Characterize Ethernet Ser Des performance (jitter, eye diagrams, BER, equalization) and validate internal data pipeline throughput across operating conditions.
• Perform chip‑level characterization across voltage, temperature, and process corners; drive root cause analysis with the SoC team.
• Validate laser/modulator performance (output power, extinction ratio, wavelength stability) and mux/demux characteristics (channel isolation, insertion loss).
• Test MCU controller firmware interactions, boot sequences, EEPROM data integrity, I²C protocol compliance, and CMIS register map implementation.
• Execute system‑level functional validation, host interoperability testing (switches, NICs), and compliance verification (IEEE 802.3, CMIS, OIF).
• Develop and run reliability/stress test sequences (HTOL, LTOL, power cycling, thermal cycling).
• Build test setups and automation scripts (Python); create data collection and analysis pipelines; document procedures and results.

• 5+ years of experience in hardware validation, silicon characterization, or transceiver testing.
• Hands‑on high‑speed serial link validation: eye diagrams, BER testing, jitter analysis, S‑parameter measurements.
• Proficiency with lab instrumentation: real‑time oscilloscopes, BERT, optical power meters, OSA, VNA.
• Experience developing and executing structured validation plans from design specifications.
• Understanding of transceiver architectures and subsystems (Ser Des, TIA, driver, laser, modulator).
• Familiarity with I²C, SPI, and serial communication protocols;
  Python scripting for test automation.
• BS/MS in Electrical Engineering, Physics, or equivalent.

• Experience with NRZ optical transceiver validation and silicon characterization across PVT corners.
• Familiarity with CMIS or similar management interface specifications.
• Experience with Ethernet standards and compliance testing; equalization techniques and Ser Des tuning (FFE, DFE, CTLE).
• Optical component characterization experience (laser IV/LI curves, modulator transfer functions).
• Experience in a startup or fast‑paced development environment.