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Senior DFT Verification Engineer | SystemVerilog & UVM
Job in
Palo Alto, Santa Clara County, California, 94306, USA
Listed on 2026-07-15
Listing for:
Delos Data Inc
Full Time
position Listed on 2026-07-15
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Delos Data Inc. in Palo Alto seeks a Senior DFT Verification Engineer to ensure the functionality, correctness, and quality of ASIC DFT logic.
You will build robust verification environments, drive coverage-driven plans, and collaborate with DFT and manufacturing engineers to deliver reliable silicon. The role requires deep System Verilog and UVM experience, familiarity with DFT topics (scan/ATPG, JTAG, MBIST), and scripting in Python.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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