Design Verification Engineer – Digital RTL & UVM
Job in
Palo Alto, Santa Clara County, California, 94306, USA
Listed on 2026-07-18
Listing for:
SPACE EXPLORATION TECHNOLOGIES CORP
Full Time
position Listed on 2026-07-18
Job specializations:
-
Engineering
Test Engineer, Validation Engineer, Electronics Engineer, Quality Engineering
Job Description & How to Apply Below
SpaceX is seeking a Design Verification Engineer (Silicon Engineering) to verify digital ASICs at block and system levels, develop test benches, and drive pre‑ and post‑silicon validation. You will implement UVM or non‑UVM test environments, automate tests with Python and MATLAB, and contribute to chip bring‑up and verification cycles.
The role requires a Bachelor's in EE/CS/CE and 1+ years of design verification and test bench development, with strong coding skills and willingness to work in a
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