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Senior ASIC Verification Architect - AI Accelerator SoC
Job in
Palo Alto, Santa Clara County, California, 94306, USA
Listed on 2026-07-18
Listing for:
Rivian
Full Time
position Listed on 2026-07-18
Job specializations:
-
Engineering
Hardware Engineer, Test Engineer
Job Description & How to Apply Below
Rivian is seeking a Sr. Staff Design Verification Engineer to join the ADAS and Inference Silicon team in Palo Alto. You will own end-to-end functional verification of the next-generation SoC, focusing on AI accelerator architectures, verified with System Verilog/UVM and CDV methodologies.
Collaboration with firmware through emulation and FPGA prototyping will be essential to validate full-stack software. The role requires 10+ years of ASIC verification experience, a strong background in computer
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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