Formal Verification Research Scientist

Formal Verification Engineer

Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.

Backed by Silicon Valley's top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), CTOs of Synopsys & Global Foundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.

In this role, you'll develop new formal verification methods to enable formal proofs of design correctness using model checking, property verification, and equivalence analysis. You'll collaborate closely with RTL, verification, and ML research teams to develop hybrid formal engines that reason about AI-generated hardware 'll define formal properties, automate assertion synthesis, and build systems that verify at the speed of thought.

You will prototype research ideas, evaluate them on real RTL designs, and work closely with RTL, ML, and verification teams to turn novel methods into practical systems.

• Research experience in formal methods, theorem proving, model checking, or program analysis

• Jasper Gold, VC Formal, or similar formal verification tools

• Assertion-based verification (SVA)

• Model checking and property decomposition

• Equivalence checking, abstraction refinement, and formal coverage