PCB Design & Validation Engineer

Cspeed IO is a stealth start up backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and infrastructure businesses at companies like Broadcom, Lumentum, Tesla, Apple, Samsung, Intel, and VMware.

Cspeed IO is developing next-generation optical semiconductor solutions for the AI infrastructure market, focused on enabling true “scale-up” architectures. Our mission is to replace traditional copper interconnects with advanced fiber-optic technologies that overcome the limitations of existing optics solutions and architectures.

We are seeking a PCB Design & Validation Engineer to own the design of test/eval boards and lead validation of our high-speed optical transceivers. You will design the PCB platforms that enable development and characterization, with the opportunity to lead PCB design for the transceiver module itself. You will review transceiver requirements, develop validation plans, and execute them across all major subsystems:
Ethernet Ser Des, internal data pipeline, laser/modulator, mux/demux, and the MCU controller with EEPROM and I2C interfaces.

• Own schematic capture,component selection, and layout for test/eval boards, development platforms, and transceiver module PCBs
• Design multi-layer, controlled-impedance boards with high-speed NRZ routing, mixed-signal considerations, and PDN design
• Manage DRC,faboutputs (Gerbers, assembly drawings), vendor coordination;maintainschematic/footprint libraries

• Develop and execute validation plans covering silicon, module, and system-level testing with defined pass/fail criteria
• Characterize Ser Des performance (jitter, eye diagrams, BER, equalization) andvalidatedata pipeline throughput across PVT corners
• Validate optical subsystems (laser/modulator power, extinction ratio, wavelength stability; mux/demuxisolation, insertion loss)
• Test MCU firmware interactions, boot sequences, EEPROM integrity, I2C compliance, and CMIS register map implementation
• Execute host interop testing, standards compliance (IEEE 802.3, CMIS, OIF), and reliability sequences (HTOL, thermal cycling)
• Build test setups and Python automation; create data analysis pipelines; document procedures and results

• 5+ years in PCB design and/or hardware validation for high-speed digital/optical systems
• Proficiency with PCB design tools (Altium Designer, Cadence Allegro, or equivalent); multi-layer boards with controlled impedance
• Hands-on high-speed serial link validation: eye diagrams, BER testing, jitter analysis, S-parameters
• Proficiency with lab instrumentation: real-time oscilloscopes, BERT, optical power meters, VNA, TDR
• Understanding of transceiver architectures and subsystems (Ser Des, TIA, driver, laser, modulator)
• Python scripting for test automation; familiarity with I2C, SPI, and serial protocols
• BS/MS in Electrical Engineering or equivalent

• Experience with NRZ optical transceiver validation and silicon characterization across PVT corners
• Familiarity with SI/PI simulation tools (Hyper Lynx, HFSS, ADS); flex-rigid or HDI PCB design experience
• Experience with CMIS or similar management interfaces;
  Ethernet compliance testing
• Knowledge of reliability testing methodologies (Telcordia, JEDEC) and FEC performance validation
• Experience in a startup or fast-paced development environment