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Senior Design Verification Engineer (Silicon & SoC)
Job in
Palo Alto, Santa Clara County, California, 94306, USA
Listed on 2026-08-14
Listing for:
Doist
Full Time
position Listed on 2026-08-14
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
River AI seeks exception design verification engineers to verify high-performance custom silicon. You will define test benches, implement verification environments, and collaborate with RTL, performance modeling, and compiler teams in Austin or Palo Alto.
Role involves UVM-based verification, constrained-random testing, coverage-driven approaches, and emulation. Compensation is substantial, reflecting senior expertise and location in the United States.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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