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DFT ASIC Engineer — RTL/Scan & ATPG
Job in
Palo Alto, Santa Clara County, California, 94306, USA
Listed on 2026-08-20
Listing for:
SPACE EXPLORATION TECHNOLOGIES CORP
Full Time
position Listed on 2026-08-20
Job specializations:
-
Engineering
Test Engineer, Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below
SpaceX is seeking an ASIC/SOC DFT Engineer (Silicon Engineering) to develop cutting-edge ASICs for Starlink. You will work with cross-functional teams to design, verify, and implement scan insertion, DFT fabrics, and ATPG for high-reliability space systems.
The role requires a Bachelor’s in EE/CE/CS and 1+ years in ASICs, with experience in Verilog/System Verilog, UPF, and design-for-test workflows. Expect a highly dynamic, collaborative environment with long-term growth.
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