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Advanced Power Integrity & Power Delivery Architect

Job in Palo Alto, Santa Clara County, California, 94306, USA
Listing for: Rivian
Full Time position
Listed on 2026-08-20
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 160000 - 260000 USD Yearly USD 160000.00 260000.00 YEAR
Job Description & How to Apply Below

About Rivian

Rivianis on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract.

As a company, we constantly challenge what's possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it for future generations.

Role Summary

We are seeking a highly skilled and motivated Power Integrity & Power Architecture Engineer to lead the end-to-end design, modeling, simulation, and post-silicon validation of advanced SoC power delivery architectures. In this role, you will bridge the gap between System-on-Chip (SoC) design, power architecture, silicon packaging, and system-level power integrity.

Responsibilities
  • Power Delivery Network (PDN) & Architecture:
    Define and optimize overall SoC power architecture, establishing target impedance, transient droop specifications, and efficiency targets across the full path:
    SoC/Packaging/Board.
  • Advanced Power Supplier Architecture:
    Define requirements and simulation flows for next-generation power supplier architectures, such as IVRs, integrated switching regulators. Co-optimize power delivery for high efficiency, low supply ripple, tight transient droop targets, and strict thermal limits across the SoC, package and system.
  • SoC Integration:
    Perform co-design and co-optimization for silicon packaging, interposers, embedded passives to ensure robust power integrity.
  • Multi-Domain Modeling:
    Conduct pre- and post-layout power integrity (PI), signal integrity (SI), and IR/droop simulations using
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