Member of Technical Staff - Applied AI

About Architect

Architect is a frontier AI lab for chip design. We build AI models and tools for on-demand custom ASICs  goal is to co-design custom ASICs alongside evolving ML workloads, and enable a new era of domain‑specific chips that unlock capabilities impossible with current hardware paradigms. Born out of Stanford Research, our team blends AI with Silicon with a founding team from Anthropic, Google Deep Mind, Meta Super Intelligence, xAI, Apple and Intel.

As a Founding Member of the Technical Staff (Applied AI) at Architect, you’ll sit at the intersection of chip design and frontier AI — translating deep hardware engineering expertise into agentic systems that can reason about, generate, and verify real silicon.

• Design and build AI agents that tackle core chip‑design tasks, grounding model behavior in how real hardware engineers actually work.

• Own end‑to‑end agent workflows: scaffolding, tool use, evaluation harnesses, and the domain‑specific infrastructure that makes agents useful on actual design problems.

• Serve as the hardware conscience of the model — curating high‑quality data, defining evaluation criteria, and encoding the engineering judgment that separates plausible outputs from correct ones.

• Partner closely with the ML research, post‑training, and infra teams to turn hardware domain expertise into reward signals, benchmarks, and training signal.

• Move fast in a 0→1 environment: prototype, dogfood, break things, iterate. Translate ambiguous chip‑design challenges into concrete agent capabilities that ship.

• Degree: MS or PhD in Electrical Engineering, Computer Engineering, EECS, or a closely related field.
• Hardware Background: Strong industry or research experience as an RTL design or Design Verification engineer, with a solid understanding of the modern chip design flow end to end.
• Software Engineering: Excellent software engineering fundamentals — comfortable writing clean, production‑grade Python or Typescript, building tooling, and working in modern engineering environments. This is a non‑negotiable bar.
• Builder Mindset: Demonstrated ability to own ambiguous problems end to end, prototype quickly, and product ionize what works. Pragmatic, not precious.
• Curiosity for AI: Genuine excitement about applying frontier AI to hardware. No prior applied‑AI or ML research background is required — we’ll meet you where you are.

• Prior experience on AI‑for‑chip‑design or AI4
  
  EDA efforts at Google, NVIDIA, or at chip / EDA companies.
• Experience building, using, or evaluating LLM‑based tooling for engineering workflows.
• Publications or open‑source contributions at the intersection of ML and EDA (DAC, ICCAD, DVCon, MLCAD, NeurIPS, ICLR, ICML).
• Experience as an early engineer at a deeptech or AI startup.

• Competitive salary and meaningful equity stake
• Fast‑paced startup with autonomy and visible impact
• Cutting‑edge AI‑driven chip design challenges