Physical Design Engineer III

Silicon Physical Design Engineer III

Remote
• 12 month contract

• Develop and own physical design implementation of multi‑hierarchy low‑power designs including physical‑aware logic synthesis, design for testability, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes.
• Resolve design and flow issues related to physical design, identify potential solutions, and drive execution.
• Perform power analysis based on netlist.

• 5 years of relevant physical design experience.
• Experience with physical‑aware logic synthesis and achieving optimal synthesis QoR on low‑power designs.
• Knowledge of static timing analysis, defining timing constraints and exceptions, corners/voltage definitions.
• Experience in chip power analysis.
• Experience with custom or regular clock tree synthesis implementation at block or top level, and clock power reduction techniques.
• Proficiency in Python, TCL, Perl programming.

• MSEE/CS or equivalent experience.

• Bachelor’s degree in Electrical/Computer Engineering or Computer Science (required).
• Master’s Degree preferred but not required.

• Seniority level:
  Mid‑Senior.
• Employment type:
  
  Contract.
• Job function:
  Other.
• Industries:
  Technology, Information and Media.