PDK Engineer; FP

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award‑winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn.

But we couldn't do it without our extraordinary workforce – and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!

As a Staff PDK Engineer, you will assist in designing high‑performance mixed‑signal ASICs by developing & integrating technology files, models & decks (DRC, LVS, and PEX) to support our PDKs. Collaborate closely with design teams, foundries, and our silicon technology team to develop and verify PDKs. You will apply expertise to EDA methodology, including development, qualification, automation, and support, as well as evaluation & development of new tools & flows.

• Work closely with design & layout teams to support tape out of IC designs.
• Develop and qualify physical verification decks.
• Install, customize and test foundry PDKs.
• Customize and test our analog/mixed‑signal environment.
• Support IC tape out methodology.
• Mentor other PDK Engineers.

• BS in Electrical or Computer Engineering and 12+ years of proven experience in related CAD field or MS in Electrical or Computer Engineering and 10+ years of experience.
• A strong understanding of front‑to‑back analog/mixed‑signal design methodology.
• Strong experience on DRC, LVS and parasitic extraction flow (based on Calibre is a plus).
• Experience with PDK installation, customization and QA.
• Experience with PDK development and validation.
• Ability to effectively support layout & design teams.
• Able to demonstrate programming knowledge in Perl, SKILL, Tcl, Python and/or shell scripting.
• A hardworking individual who possesses strong organizational & interpersonal skills, and demonstrates versatility in handling a wide range of CAD methodology issues.
• Expertise in one or more of the following areas:
  Developing Cadence dfII technology files, netlisting, simulation & Pcells OR Development of physical verification decks in Calibre DRC.

• Experience working with revision control systems. Perforce is a plus.
• Familiarity with Calibre PERC and/or Insight.
• Familiarity with EM/EMIR methodology.

Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.

Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job‑related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.