Senior Physical Design Application Engineer

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** Welcome!**## .We seek a Senior Applications and Solutions Engineer to provide technical support to Intel Foundry Services customers on PDKs, digital reference flows, and design signoff methodologies with specialized focus on Cadence tool suites. This role drives quality improvements in design kits through ASIC design reference flow validation and supports customers through successful tape-outs.
** Key Responsibilities*
* ** Core Competencies** - Self-driven and results-oriented with ability to manage multiple tasks effectively

Strong teamwork skills to drive solutions for customer design implementation challenges
- Excellent communication skills with experience in collaboration and customer feedback

The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
** Minimum Qualifications
*** US Citizenship required
* Ability to obtain a US Government Security Clearance
* Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM-related field of study
* 4+ yearsof experience with advanced CMOS processes (22nm and below)
* 3+ yearsof experience in ASIC physical design implementation and/or ASIC design signoff (SoC/ASIC)
* 3+ yearsof experience in one of the following scripting languages (i.e. Python, Perl, Tcl, shell scripting)
** Preferred Qualifications**- Customer-facing experience in technical support roles

Experience with state-of-the-art process technology (7nm and below)- Hands-on experience in Cadence EDA-based ASIC design implementation including full-chip integration, synthesis, APR, static timing analysis, layout verification, and reliability verification

Proficiency with Cadence EDA tools and flows:
Innovus, Tempus, Tempus

ECO, Pegasus, Voltus

Experience with Synopsys tools (Fusion Compiler, Prime Time, Prime ECO, ICV) is a plus

- Experience with hierarchical and multi-voltage domain design, top-down design, budgeting, and correlation across implementation and verification tools
** What We Offer
** Opportunity to work with cutting-edge digital design technologies for foundry services
- Competitive compensation
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