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Speed CMOS Analog Design Engineer; DAC​/ADC​/PLL

Job in Phoenix, Maricopa County, Arizona, 85003, USA
Listing for: Chelsea Search Group
Full Time position
Listed on 2026-02-16
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 120000 USD Yearly USD 90000.00 120000.00 YEAR
Job Description & How to Apply Below
Position: High-Speed CMOS Analog Design Engineer (DAC/ADC/PLL)
A leading engineering recruitment firm is seeking a High-Speed CMOS DAC/ADC/PLL Analog Design Engineer in Phoenix, Arizona. This full-time position involves responsibilities like clock generation, custom passive component design, and high-speed analog circuit design. The ideal candidate will have a BSEE/MSEE or PhD with over 5 years of experience in analog design, familiarity with advanced CMOS technologies, and strong communication skills.

Applicants with lab chip debugging experience will be preferred. Competitive salary and benefits are offered.
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