FPGA​/Firmware Engineer

TPA-998658bd-22da-4e53-97d9-8

Pay Rate: $115k - $135k (estimate)

FPGA/Firmware Engineer (Mid-Level). This role is for a mid-level FPGA/Firmware Engineer involved in the redevelopment of a flagship product. Responsibilities include VHDL code development, interface control between the FPGA and Digital-to-Analog Converters (DAC) or Analog-to-Digital Converters (ADC), IO control in reference to aircraft systems, and providing documentation to support certification (DO-254). The role focuses on integrating commercial off-the-shelf FPGAs (e.g., Xilinx) and writing VHDL for interfaces and I/O.

Location:

Willingness to work onsite 5 days a week in Phoenix, AZ (Grand Rapids, MI as a secondary option, St. Pete Florida as 3rd).

Schedule:

980.

Top 1-2 Priorities this role will be expected to deliver within the first 90 days:

Team Structure:
They will work closely with a technical lead (responsible for architecture) and a senior engineer (DO-254 process lead). Day-to-day tasking will be guided by these two senior firmware engineers, allowing for mentorship and growth within a highly senior team.

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• Bachelor's degree in engineering related field
• 6-8 years of experience in FPGA/firmware development programs.
• Strong experience with VHDL development, designing interfaces, and I/O for FPGA devices (e.g., Xilinx).
• Familiarity with Aerospace documentation requirements for firmware, specifically DO-254 (complex electronic hardware certification).
• Must be a US person due to export-controlled technology.

Benefit packages for this role will start on the 1st day of employment and include medical, dental, and vision insurance, as well as HSA, FSA, and DCFSA account options, and 401k retirement account access with employer matching. Employees in this role are also entitled to paid sick leave and/or other paid time off as provided by applicable law.