FPGA​/Firmware Engineer

LOCATION: Phoenix, AZ 85027 (Onsite, Monday – Friday, 9/80 schedules – Every other Friday off)

COMPENSATION: $135,000 base salary + 7% incentive bonus

BENEFITS: Medical, Dental, Vision, Disability & Life Insurance, FSA, HSA, PTO, Parental Leave, 401(k), Tuition/Education Assistance, EAP

• 3-5+ years of FPGA or firmware development experience.
• Strong VHDL and/or Verilog RTL coding experience.
• Experience designing FPGA interfaces and working with I/O systems.
• Hands‑on experience with Xilinx or Microchip FPGAs and associated tool chains (Vivado, ISE, Libero).
• Experience with simulation tools (Active‑HDL, Questa Sim, etc.).
• Familiarity with requirements‑based verification processes.
• Understanding of DO‑254 or similar structured/certification‑driven development environments.
• Bachelor’s degree in Engineering or related field.

• Experience with DO‑254 documentation (HRD, HDD, HCI, PHAC, etc.).
• Exposure to MBSE (Model‑Based Systems Engineering).
• Experience integrating with RTOS environments.
• Background in RF systems or FPGA‑based signal processing (L‑Band or similar).
• Familiarity with DO‑160 and/or DO‑178 standards.

SUMMARY & RESPONSIBILITIES

An aerospace organization in Phoenix is looking for an FPGA / Firmware Engineer to support the redevelopment of a flagship product. This is a hands‑on role focused on VHDL development, FPGA integration, and interface control within aircraft systems. You’ll be working alongside a highly experienced team, including a technical lead driving architecture and a senior engineer leading DO‑254 certification efforts. This is a strong opportunity to work across the full FPGA development lifecycle in a certification‑driven aerospace environment.

• Developing VHDL code for FPGA-based systems supporting aerospace applications.
• Designing and implementing FPGA interfaces, including ADC/DAC integration and I/O control.
• Supporting communication between FPGA and aircraft subsystems.
• Working with Xilinx and Microchip FPGA platforms using tools like Vivado, ISE, and Libero.
• Running simulations and validation using Active‑HDL and/or Questa Sim.
• Participating in requirements‑based verification and structured development processes.
• Creating and maintaining documentation required for DO‑254 certification.

• Jump quickly into active development work, contributing to VHDL coding and FPGA interface design.
• Get up to speed on system architecture and begin owning portions of the design.
• Produce documentation aligned to DO‑254 standards and demonstrate process‑driven development.
• Integrate into the team’s workflow while learning from senior engineering leadership.