Packaging Customer Engineer

Job Details

Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting‑edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry‑leading technology, a rich IP portfolio, a world‑class design ecosystem, and an operationally resilient global manufacturing supply chain.

The IFS Packaging and Test Business Group packages are a critical revenue enabler for IFS and a key part of Intel’s forward‑looking strategy. IFS Packaging Test Business Group has been created to develop, grow, and execute a robust packaging roadmap.

• Collaborate with IFS Customer product design, internal product design, silicon process development, Intel’s Assembly Test Technology Development (ATTD), and Product Engineering teams to drive product architecture definition, product package design and execution.
• Serve as the engineering interface to IFS Customers for packaging services to promote Intel packaging technologies, to perform technical feasibility and risk assessments, to analyze product ask vs. the ATTD packaging roadmap and to close the deal with the customer.
• Drive customer‑facing technology reviews as the key engineering interface between the customer and Intel Foundry, owning the customer packaging engineering relationship from product concept through product mass production.
• Work with IFS Business Development, ATTD, ATM and Supply Chain to complete RFQ risk assessments and pricing assessments.
• Capture customer feedback and competitive trends that can better inform the ATTD packaging roadmap.
• Represent the customer in internal technology working groups for new technologies during pathfinding and development.
• Interact and make recommendations to Intel VPs and Corporate VPs, conversing and being knowledgeable in both internal roadmaps and external industry trends.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field.
• 9+ years of experience in semiconductor packaging.
• Hands‑on experience in one or more of the following areas:
  • Power delivery
  • High‑speed signaling
  • Thermal‑mechanical analysis
  • Process development
  • Die disaggregation architectures
• Experience presenting technical information to external customers and suppliers.

• Master’s or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM discipline.
• Strong knowledge of Intel packaging technologies.

• Project Management, Risk Assessment
• English

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Experienced Hire

Shift 1 (United States of America)

US, Arizona, Phoenix

US, California, Santa Clara

N/A

Annual Salary Range for jobs which could be performed in the US: $- USD

This role will require an on‑site presence.

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.