Principal PCB & Substrate Layout Engineer

** Job Title** :
Principal PCB & Substrate Layout Engineer

** Location** :
Phoenix, AZ-Onsite

** Duration** : 7+ months with possible extensions

** Pay** : $110-$115/hr. (depending on experience)

** Shift** : 9-80 Schedule. 1 st  Shift

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* Job Summary:

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* Our client is seeking an experienced Principal PCB & Substrate Layout Engineer to join their growing, engaging, and collaborative team. As a valued team member, you will collaborate to deliver leading edge microelectronics that are game changing and impactful to our nation's defense..

You are responsible for:

Providing technical leadership to the engineering team specifically focused on High-Speed Interfaces and High Density Substrates layout techniques and understanding and improving our layout development processes to ensure we produce quality products using your expertise in PCB and Substrate layout engineering.

** Responsibilities:*
* - Driving design, layout, and analysis of complicated electrical and mechanical systems and their constituent parts including: high-density interposers, substrates, and printed circuit board (PCB) layouts. This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip)

- Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias, ball grid arrays (BGAs), RF, design for test (DFT), impedance calculations, cross talk, differential pairs, PCB stack-ups, PCB via structures, electromagnetic compatibility (EMC), material studies/selection, etc.

- Understand Design For Manufacturing rules of our suppliers and ensure design process matches their capabilities

- Understand and provide fabrication drawings that match the intent of the design and support the fabrication suppliers to ensure the technical intent is transferred successfully

- Support package material characterization frequency dependent model; skin effects, smoothness, roughness, dielectric loss and dielectric constant

- Work with peers and the engineering team to review the artwork and drawings at different stages and at the final design review for fabrication and assembly

- Provide support for multidisciplinary investigations and feasibility studies with collaboration across engineering disciplines

- Provide Technical guidance for interfacing to customers, subcontractors, assemblers, fabricators, and vendors/suppliers, operations, quality, supply chain, and supporting organizations

- Works on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors

- Considers the effects of actions on the system as a whole, i.e. "systems-thinking"

- Willing to help the team in areas outside of specific technical discipline to accomplish goals

-Create assembly drawings using AutoCAD. Create, manage and maintain DX Designer/CAE component libraries, coordinating CAD data with off-site PCB layout vendors.

-Defines and selects new approaches and implementation of CAD software engineering applications and design specifications and parameters.

-Develop scripts and automation tools to ease CAE tool usage.

-Develops routines and utility programs.

-Ensure the information and specifications provided for the FAB drawing are accurately reflected on such document.

-May specify materials, equipment and supplies required for completion of projects and may evaluate vendor capabilities to provide required products or services.

-Participate in the process of defining footprint specifications for PWB design and layout. Schematic support to the Electrical Engineering community.

-Work on problems of moderate scope where analysis of situations or data requires a review of a variety of factors.

** Required skills and experience** :

- Minimum Education:

Bachelor's Degree in Engineering or equivalent education and experience required

- Minimum Experience:

10+ years as a PCB and/or High-Density Package Layout designer using industry standard layout tools like Cadence APD

- Experience with APD+ physical and electrical constraint editor

- HDI stack-ups, including use of blind & buried micro-vias, specialty RF dielectric materials, and trace width/spacing around 15um/15um down to 2um/2um or below

- Experience with …