Senior Member of Technical Staff, Thin Films Engineer

Overview

Join Intel's Manufacturing Development and Customer Engineering (MDCE) team as a senior technical leader to drive process innovation across advanced semiconductor technologies in volume manufacturing. The role leads thin‑film deposition process development, optimization, and manufacturability, bridging technology development and high‑volume manufacturing.

• Lead thin‑film process excellence across CVD, ALD, PVD, epitaxy, thermal/plasma deposition, furnace, implant, anneal, and treatment technologies.
• Champion safety, quality, yield, throughput, and cost optimization for thin‑film deposition modules.
• Reduce defectivity and improve uniformity through systematic process enhancement.
• Resolve technical problems and deliver solutions meeting aggressive node targets.
• Optimize equipment performance in collaboration with internal teams and key suppliers.
• Align technical vision with customer requirements and business objectives.
• Synthesize complex data to formulate strategic responses and own end‑to‑end resolution of manufacturing challenges.
• Deliver rapid execution of innovative solutions within development timelines.
• Collaborate with Technology Development, High‑Volume Manufacturing, Business Groups, and external suppliers.
• Build relationships with Integration, Device, Yield, Quality, Reliability teams, and suppliers.
• Present technical findings to diverse audiences, from teams to executive leadership.
• Stay current with semiconductor industry trends and emerging process technologies.
• Drive initiatives that position Intel at the forefront of manufacturing innovation.
• Contribute to technology roadmaps through technical expertise and market insight.

Technical excellence, strong analytical skills, deep manufacturing knowledge, leadership capabilities, outstanding communication, self‑motivation, and a proven track record in thin‑film process development.

• Master's degree in Electrical, Mechanical, Chemical Engineering, Materials Science, or a related STEM field.
• 5+ years of semiconductor industry experience focused on thin‑film deposition processes.
• Proven experience in process development, technical leadership, and manufacturing engineering.
• Experience working with equipment suppliers (AMAT, LAM, ASM, TEL) on process optimization.
• Fab startup experience across manufacturing, quality, R&D, and supply chain functions.
• Experience with Statistical Process Control (SPC), Design of Experiments (DOE), and factory automation systems.

• Ph.D. in Electrical, Mechanical, Chemical Engineering, Materials Science, or a related STEM field with research publications and patents in thin‑film technologies.
• Experience in Gate All Around (GAA) logic technologies within semiconductor foundry environments.
• Experience delivering customized solutions across Technology Development and HVM.
• Cross‑functional leadership experience managing diverse stakeholder groups.
• Semiconductor foundry industry experience.

Primary

Location:

United States (Oregon, Hillsboro). Additional locations: US, Arizona, Phoenix. Shift 1.

This role supports a hybrid work model, allowing time both on‑site at Intel facilities and off‑site.

Annual salary range (US): $ – $ USD. Total compensation includes competitive pay, stock bonuses, and benefit programs (health, retirement, vacation).

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.