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Analog Engineer

Job in Phoenix, Maricopa County, Arizona, 85003, USA
Listing for: Intel Corporation
Full Time position
Listed on 2026-07-13
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Hardware Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 164470 - 269100 USD Yearly USD 164470.00 269100.00 YEAR
Job Description & How to Apply Below

Join Intel's Advanced Design Foundational IP Organization (AD-FIP) as an Analog Circuit Design Engineer. You will design and develop cutting‑edge analog circuits in advanced process nodes, directly impacting Intel’s foundational IP and product designs across client, server, and networking technologies.

Responsibilities
  • Design, develop, and implement analog circuits and mixed‑signal IPs, including ADCs, DACs, voltage regulators, and high‑speed I/O interfaces.
  • Perform circuit‑level design, simulation, and optimization to meet power, performance, area, timing, and yield requirements.
  • Create and validate floor plans, extract chip parameters, and simulate analog behavior models.
  • Develop test plans for design verification and evaluate test results to meet specification requirements.
  • Collaborate with architecture and layout teams to maximize functionality, robustness, and electrical performance.
  • Conduct tape‑out activities and ensure successful silicon implementation.
  • Analyze and resolve performance and circuit‑related issues during design and post‑silicon validation phases.
  • Serve as a technical interface to process technology, IP engineers, and product teams, influencing future process node development.
Qualifications
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field and 8+ years of experience in analog and mixed‑signal circuit design; or Master’s degree with 6+ years; or PhD with 4+ years.
  • 3+ years of experience with analog circuit design, simulation, and verification.
  • Proficiency in CMOS technologies and layout understanding for analog circuits.
  • Experience with tape‑out processes for analog mixed‑signal circuits, including ADCs and DACs.
  • Knowledge of SoC analog layout design checks and methodologies.
  • Preferred:
    Advanced knowledge of high‑speed parallel or serial I/O links, PLLs, bandgap references, inductors, transmission lines, RF or millimeter‑wave circuits.
  • Preferred:
    Strong understanding of power delivery networks and integrated power regulators.
  • Preferred:
    Proven ability to collaborate across teams and influence decisions related to process technology and product development.
Benefits
  • You will receive a competitive salary range of $164,470 – $269,100 USD (depending on location).
  • Stock bonuses and comprehensive benefits including health, retirement, and vacation.
  • Hybrid work model allowing on‑site and off‑site work.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sexual orientation, or any other characteristic protected by local law.

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