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Packaging Module Development Engineer

Job in Phoenix, Maricopa County, Arizona, 85003, USA
Listing for: Able Too Work
Full Time position
Listed on 2026-08-30
Job specializations:
  • Engineering
    Process Engineer, Manufacturing Engineer, Materials Engineering
Salary/Wage Range or Industry Benchmark: 134000 - 220000 USD Yearly USD 134000.00 220000.00 YEAR
Job Description & How to Apply Below

Job Details Job Description The Role and Impact

As a Packaging Module Development Engineer, you will play a pivotal role in advancing Intel's assembly and packaging technologies. You will develop and optimize processes, equipment, and materials to enable the next generation of innovative packaging solutions. Your daily work will directly contribute to improving manufacturing efficiency and the quality, reliability, and scalability of Intel's products.

Business Group

Join Intel's Substrate Packaging Technology Development (SPTD) organization, a leader in developing cutting-edge substrate and packaging solutions. SPTD enables Intel’s advanced packaging technology roadmap through materials innovation, process optimization, and equipment development, supporting the delivery of affordable, high-performance products to the global market.

Key Responsibilities
  • Drive innovation in packaging technology by identifying early-stage reliability issues and developing effective solutions.
  • Optimize equipment configurations, process specifications, and integration flows to enable advanced packaging technologies.
  • Collaborate with cross-functional teams to design and execute experiments that evaluate process and material interactions.
  • Lead continuous improvement initiatives to enhance process capability, stability, productivity, automation, yield, and manufacturability.
  • Establish material specifications and partner with supplier quality teams to ensure compliance with requirements, with a particular focus on dielectric materials and processes.
  • Apply statistical methods and design of experiments (DOE) principles to characterize processes, solve complex technical challenges, and improve performance.
  • Drive the development of next-generation patternable dielectric materials and fabrication processes to scale advanced semiconductor packaging capabilities.
  • Manage projects to ensure alignment with product development schedules, milestones, and execution goals.
  • Respond with urgency and professionalism to foundry customer requests, escalations, and manufacturing events.
  • Document technical advancements through papers and contribute to knowledge sharing across the organization.
The ideal candidate will demonstrate
  • Technical leadership, strategic planning, and critical thinking skills.
  • Ability to coach, mentor, and develop technical teams.
  • Adaptability and comfort working in ambiguous, fast-paced environments.
  • Flexibility in managing changing priorities and responsibilities.
  • Experience leading teams within highly matrixed organizations.
  • Strong initiative and the ability to work independently.
  • Excellent communication, influencing, technical, and analytical skills.
Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications
  • Bachelor's degree in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, Organic Chemistry, Polymer Engineering, or a related field, with 6+ years of related experience; OR
  • Master's degree in the above fields, with 4+ years of related experience; OR
  • PhD in the above fields, with 2+ years of related experience.
Experience listed above should be a combination of the following
  • Proficiency in design of experiments (DOE), statistical data analysis, and/or process control tools.
  • Semiconductor or packaging processing experience.
Preferred Qualifications
  • 2+ years of experience with material development such as patternable dielectric materials formulations is a plus.
  • Hands-on experience with dielectric/photo-resist patterning process development, including lamination or coat/bake/develop optimization, resist profile engineering, and process window characterization
  • Hands-on experience developing experimental setups to validate modeling and simulation.
Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location

US, Arizona, Phoenix

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel () .

Annual Salary Range for jobs which could be performed in the US: $- USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and…

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