Senior SoC Network Subsystem Architect

** Job Details:*
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* Job Description:

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* ** About the Role*
* The CEG NAG (Networking Architecture Group) is Intel's premier team focused on defining the future of high-performance networking silicon. Our team architects next-generation networking solutions that enable hyperscale data centers, cloud infrastructure, and AI workloads to achieve unprecedented performance and efficiency. We specialize in IPU/DPU platforms, advanced packet processing architectures, and programmable networking technologies that form the backbone of modern distributed computing systems.

We are seeking a  
** Senior SoC Network Subsystem Architect
** to define and lead the architecture of high-performance network subsystems for next-generation IPU/DPU platforms. This role focuses on designing scalable, programmable networking pipelines that support hyperscale and cloud data center workloads.

You will drive the  
** end-to-end Network Subsystem (NSS) architecture** , including packet processing pipelines, protocol engines, QoS frameworks, and observability features. This is a highly cross-functional leadership role requiring deep technical expertise and strong collaboration across hardware, software, and systems teams.

** What You'll Do*
* ** Key responsibilities will include but not limited to:*
* ** Network Subsystem Architecture Definition*
* 1. Own end-to-end NSS architecture, including packet processing pipelines, protocol engines, and interface datapaths

2. Architect high-performance packet pipelines supporting hundreds of millions of packets/sec throughput and processing flows

3. Drive architectural direction for programmable vs. fixed-function pipeline balance and future extensibility

4. Specify network subsystem pipeline scaling strategies and define multi-generation NSS architecture roadmap

6. Lead design decisions for pipeline partitioning, feature scalability, and backward compatibility

** QoS, Scheduling, and Flow Management*
* 1. Architect advanced scheduling frameworks (per-flow shaping, multi-level scheduling, traffic class isolation)

2. Define QoS models to support multi-tenant workloads, virtualization, and service chaining

** Debug, Telemetry, and Observability*
* 1. Define architecture for telemetry, performance counters, and real-time observability of pipeline behavior

2. Architecture support for field debug, failure triage, and large-scale deployment monitoring

** Cross-Functional Leadership*
* 1. Collaborate across SoC, compute, memory, SW/FW, validation, and customer teams to drive architecture closure

2. Interface with external customers to translate workload requirements into NSS architecture decisions

3. Lead architectural reviews and influence cross-team technical direction

** Behavioral traits that we are looking for:*
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** Strategic thinker:
** Ability to define long-term architecture vision and align stakeholders

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** Technical leadership:
** Influences across teams without direct authority

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** Problem solver:
** Approaches complex system challenges with structured thinking

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* Collaboration:

** Builds strong partnerships across engineering disciplines

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** Customer-focused mindset:
** Translates real-world workload needs into solutions

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** Adaptability:
** Navigates ambiguity and evolving technical requirements

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** Ownership mindset:
** Drives initiatives from concept through execution

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.

See  Intel Benefits ()  for more details.

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* Qualifications:

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* Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

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* Note:

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* ** For information on Intel's immigration sponsorship guidelines, please see*
* Intel U.S. Immigration Sponsorship Information ()

** Minimum Qualifications and Experience** :

Bachelor's degree in Electrical/Computer Engineering, Computer Science or related degree with 7 + years of experience.

You must have 7+ years of experience in the following:

+ Networking ASIC / SoC / IPU / DPU architecture

+ High-speed packet processing pipelines

+ Experience in system-level architecture tradeoffs

+ Define and deliver architecture for large-scale data center networking systems

** Preferred Qualifications and Experience** :

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Experience with programmable datapath architectures (P4, pipeline microcode, or hybrid models)

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Experience with AI/HPC scale-out networking and congestion control architectures

+ Transport protocols offloads

+ QoS, scheduling, and multi-tenant isolation

+ Familiarity with coherent or shared-memory offload models (e.g., CPU-IPU integration)

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Experience with hyperscaler deployments or customer co-design engagements

** Join us in building a brighter future through technology innovation!*
* ** Job Type:*
* Experienced Hire

** Shift:*
* Shift 1 (United States of America)

** Primary

Location:

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* US, California, Santa Clara

** Additional…