Layout Engineer
Listed on 2026-02-03
-
Engineering
Systems Engineer, Electrical Engineering, Electronics Engineer, Manufacturing Engineer
Layout Engineer (Semiconductors)
$100,000 - $130,000 + Stock Options + Health, Disability and Life Insurance + 401k + PTO
Plano, Dallas, Texas - Fully On-Site Position
No Visa sponsorship is available
Are you a Layout Engineer looking for a technically challenging role, at a cutting‑edge semiconductor start‑up at the forefront of innovation in the industry?
On offer is the chance to join a high‑performing engineering team developing cutting‑edge analog and mixed‑signal components used in next‑generation space systems. You will act as the layout owner, responsible for identifying layout risks, proposing solutions, and driving continuous improvement across current and future projects.
Our company is a growing semiconductor innovator specializing in high‑reliability electronics for demanding applications. They’re a close‑knit team of experts who pride themselves on collaboration, technical excellence, and creating reliable technology that pushes boundaries.
On offer is a key opportunity to own the full layout design cycle, from early floor planning through verification and tape‑out. You’ll work closely with design engineers and project owners. You’ll also play a key part in improving layout methodologies, documenting flows, and supporting future scalability of the design process.
This role would suit a technically driven Layout Engineer looking for autonomy, cross‑functional collaboration, and the opportunity to work with advanced technology in a fast‑growing, mission‑focused company.
The Role:- Take full layout ownership down to "leaf cell" level floor planning and verification
- Future proofing floor plans and layouts to allow for faster ECO turn‑arounds without sacrificing quality or design integrity
- ESD cell creation and implementation
- Standard cell library development and maintenance depending on PDK/project/design requirements
- Generate and deliver verified full‑chip layout designs (.GDS/.OASIS) to the foundry for silicon processing and manufacturing
- Computer Aided Drafting and Design or related IC/PCB Layout certification with industry experience in 180 - 22nm technology nodes
- Solid understanding of semiconductor manufacturing processes, ESD effects and methods to mitigate or prevent silicon and design damage
- Experience with analog and digital specific layout techniques and knowledge of how/why to use them in various cell designs
- Knowledge and experience with antenna, cross‑talk, cross‑coupling, latch‑up, and EMIR mitigation techniques
- Experience with Cadence VXL/EXL design software and LVS/DRC verification using PVS, Assura or Calibre, and KiCAD tools
Reference Number: BBBH
268837
We are an equal opportunities company and welcome applications from all suitable candidates.
#J-18808-Ljbffr(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).