×
Apply for Jobs Apply for Jobs Post a Job Post a Job Local Jobs Home
Register Here to Apply for Jobs or Post Jobs. X
More jobs:
Electronics Engineer Engineering Design & Technologists Manufacturing Engineer Systems Engineer

Lead Physical Design Engineer: ASIC​/SoC Layout & Timing

Job in Pleasanton, Alameda County, California, 94566, USA
Listing for: ACTSearch
Full Time position
Listed on 2026-02-14
Job specializations:
  • Engineering
    Electronics Engineer, Engineering Design & Technologists, Manufacturing Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
A semiconductor company based in Pleasanton is seeking a Physical Design (Layout) Lead to oversee ASIC physical design activities. The ideal candidate will have over 10 years of experience in the implementation of ASIC/SOC, including low power design and physical design verification. Responsibilities include leading design activities and collaborating with RTL engineers on methodology improvements.

This role offers the opportunity to be instrumental in resolving design issues and improving efficiency in a dynamic environment.
#J-18808-Ljbffr
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)

Job Posting Language
Employment Category
Education (minimum level)
Filters
Education Level
Experience Level (years)
Posted in last:
Salary
Advanced Search