More jobs:
Lead ASIC DFT Engineer
Job in
Post Falls, Kootenai County, Idaho, 83854, USA
Listed on 2026-06-24
Listing for:
InfoStride Technologies
Full Time
position Listed on 2026-06-24
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Leading the end-to-end Design-for-Test strategy, the remote Lead ASIC DFT Engineer will implement and debug complex ASIC/SoC designs while ensuring effective test coverage and DFT best practices.
Key responsibilities:- Define and implement scan, ATPG, MBIST, LBIST, and JTAG architectures
- Lead DFT insertion, verification, and sign-off processes
- Drive test coverage, diagnosis, and silicon debug efforts
- 10+ years of ASIC DFT experience
- Strong expertise in scan, ATPG, MBIST, LBIST, and JTAG
- Experience with Synopsys, Cadence, or Siemens Tessent tools
- Proficient in SoC, RTL, and silicon validation
- Expertise in debugging, fault coverage, and test methodology
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×