CPU Lead Performance Architect, Silicon

Note:

By applying to this position you will have an opportunity to share your preferred working location from the following:
Portland, OR, USA;
Austin, TX, USA;
Poughkeepsie, NY, USA;
Mountain View, CA, USA
.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 10 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.
• Experience in C/C++ and scripting languages.
• Experience in performance modeling, analysis, correlation, and workload characterization.
• Experience with high-performance CPU architecture.

• PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Experience leading CPU/ML micro-architecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.
• Knowledge of Android system software components, AI/ML.
• Familiarity with Advanced RISC Machine's architecture including all its extensions such as SME.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Lead CPU Performance Architect in architecture and performance, you will be the key contributor to improve processor instruction set architecture, to develop innovative micro-architecture features, and deliver Google’s advanced SoC products. You will have the opportunity to collaborate with talents in Google’s Android applications and Google’s Artificial Intelligence (AI) teams to plan and conduct application and benchmark performance analysis, and to project their performance at various design phases.

The US base salary range for this full-time position is $183,000-$271,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

• Deliver solutions to problems, including Central Processing Unit (CPU) performance, micro-architecture design, tool infrastructure, and methodology.
• Plan, drive, and evaluate Advanced RISC Machine's (ARM's) architecture features from both architecture and performance angles.
• Define and write CPU subsystem architecture specifications.
• Lead the collaboration with RTL, design verification, and physical design teams to develop CPU implementation.
• Drive performance correlation between the performance model and RTL implementation, and perform pre-silicon and post-silicon performance bug triage.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law.

If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.