Senior CPU Design Verification Engineer, Emulation

Note:

By applying to this position you will have an opportunity to share your preferred working location from the following:
Austin, TX, USA;
Mountain View, CA, USA;
Portland, OR, USA;
Poughkeepsie, NY, USA.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience in both Design Verification (UVM/System Verilog) and Hardware Emulation.
• Experience reproducing post-silicon lab failures in emulation or simulation environments.
• Experience with industry-standard debug tools (e.g., Synopsys Verdi, Cadence Sim Vision) and scripting languages (Python, TCL, Bash) to automate debug workflows.

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Understanding of CPU/SoC micro-architecture.
• Knowledge of standard high-speed protocols (e.g., PCIe, CXL, AMBA).
• Expertise parsing post-silicon diagnostic artifacts like scan dumps, OS logs, and JTAG traces.
• Excellent communication skills to translate complex technical issues across distinct engineering domains.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct‑to‑consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

US: $163000 - $237000 (USD) + 15% bonus target + equity + benefits

• Act as the critical bridge between Emulation, Design Verification (DV), and Register-Transfer Level (RTL) teams to accelerate root‑cause analysis.
• Correlate DV simulation failures with emulation results by analyzing System Verilog/UVM test benches.
• Lead post‑silicon debug by analyzing lab artifacts (scan dumps, software logs) to reproduce silicon bugs in emulation.
• Create tools and scripts to automate debug pipelines and bridge software workloads with hardware triggers.
• Utilize deep micro‑architecture knowledge to rapidly isolate complex hardware issues.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law.

If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.