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ASIC​/FPGA Verification Engineer III, Secret Clearance

Job in Pueblo, Pueblo County, Colorado, 81004, USA
Listing for: Lockheed Martin
Full Time position
Listed on 2026-06-07
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below

Description

Join Our Team as an ASIC/FPGA Verification Engineer where you will work on the development of a sophisticated state‑of‑the‑art avionics product in a world‑class Integrated Product Development environment.

Location

This position does not support teleworking; the selected candidate will be located near our Lockheed Martin Space facility in Denver CO or Highlands Ranch CO, or in Sunnyvale CA.

Schedule

Flexible 9x80 schedule; every other Friday off.

Key Activities
  • Verify designs for low SWaP, radiation hardened, space rated devices.
  • Devise a unique verification plan for a given design.
  • Use System Verilog and Universal Verification Methodology (UVM) to verify a design in a Linux‑based high‑performance computing environment.
  • Develop test environments and test cases, generate reports, and document verification results.
  • Work with an independent design team to document and resolve bugs found in the design.
  • Support the full lifecycle of ASIC and FPGA development.
  • Support technical reviews and present to internal and external stakeholders.
Requirements
  • ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM.
  • 3+ years of professional FPGA development experience.
  • Active DoD Secret or higher clearance; US Citizen required.
Basic Qualifications
  • Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
  • Experience in the verification of FPGA and/or ASIC devices.
  • Experience with modern verification methodologies such as UVM, OVM or VMM.
  • HDL programming experience with VHDL, Verilog and/or System Verilog.
  • Active DoD Secret clearance; US citizenship required.
Desired Skills
  • Experience or coursework in the verification of FPGA and/or ASIC devices.
  • Experience in ASIC/FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
  • FPGA/ASIC design experience is a plus.
  • Experience in scripting such as Perl, TCL, Python.
  • Experience leading small teams in technical work, setting priorities, managing schedules.
  • Experience creating project plans.
Security Clearance

This position requires a government security clearance; you must be a US Citizen for consideration.

Benefits

Medical, Dental, Vision, Life Insurance, Short‑Term Disability, Long‑Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid Time Off, Holidays.

Equal Opportunity Employer

Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.

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