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FPGA & ASIC Design Engineering Manager

Job in Reading, Middlesex County, Massachusetts, 01814, USA
Listing for: Teradyne
Full Time position
Listed on 2026-06-04
Job specializations:
  • Engineering
  • Management
Salary/Wage Range or Industry Benchmark: 155500 - 248700 USD Yearly USD 155500.00 248700.00 YEAR
Job Description & How to Apply Below
A leading technology firm in North Reading seeks an ASIC and Logic Design Engineering Manager to lead FPGA design teams and oversee multiple projects. The successful candidate will have over 12 years in Digital FPGA design, extensive experience with RTL coding, and a proven track record in team management. This role involves working closely with diverse engineering disciplines to deliver complex products.

A competitive salary and comprehensive benefits are offered.
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