More jobs:
Senior FPGA Verification Engineer; SystemVerilog/UVM
Job in
Reading, Middlesex County, Massachusetts, 01814, USA
Listed on 2026-06-04
Listing for:
Teradyne
Full Time
position Listed on 2026-06-04
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
A global test and automation company is seeking a Digital Logic Verification Engineer in Reading, MA. The role focuses on FPGA verification and requires 3+ years of experience in digital logic verification. Ideal candidates should have strong knowledge of System Verilog, UVM, and common IP protocols. The position offers competitive compensation ranging from $98,700 to $157,900, alongside a discretionary bonus plan and comprehensive health benefits.
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Position Requirements
10+ Years
work experience
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