Senior SI​/PI Engineer North Reading, MA

Location: North Reading, MA, US

We are seeking a highly skilled and experienced Senior Signal Integrity/Power Integrity Engineer to join our team. In this role, you will leverage your expertise in high‑speed electronics interfaces to perform pre‑routing and post‑routing simulations for cutting‑edge designs. You will document SI/PI performance, present simulation results to teams and leadership, and ensure designs meet standards.

• Perform pre‑ and post‑routing SI/PI simulations for cables, connectors, traces across critical technologies from UART to PCI Express.
• Provide input to PCB stack‑ups to ensure optimal performance, reliability, and cost.
• Collaborate with hardware design teams to implement simulation‑based changes.
• Perform lab‑based correlation activities on physical hardware to validate simulations and improve quality.
• Identify and resolve SI/PI issues such as crosstalk, reflections, impedance mismatches, and power‑delivery noise.
• Compute the impact of signal integrity on digital timing margins.
• Provide expertise on high‑speed protocols (PCIe, USB, Ethernet, etc.) to ensure compliance with industry standards.
• Design and optimize PDN to meet system‑level requirements.
• Present complex simulation results and recommendations in written reports, presentations, and technical meetings.
• Stay informed on industry trends and emerging technologies in SI/PI engineering, PCB materials, and high‑speed interfaces.

• 7+ years of experience in SI/PI engineering, focusing on high‑speed electronics.
• Bachelor’s or Master’s degree in Electrical Engineering or related field.
• Expertise in high‑speed PCB and system simulation tools (HFSS, 3D Layout, CST, Ansys SIwave, Cadence Sigrity, Polar, etc.).
• Experience with PCB layout tools (Allegro, Altium Designer, Mentor Graphics).
• Strong understanding of high‑speed protocols such as PCIe Gen5/Gen6, USB 3.x/4.0.
• Deep knowledge of SI/PI concepts: impedance control, S‑parameters, crosstalk, reflections, eye diagrams, jitter, PDN analysis.
• Ability to interpret and apply simulation results to inform design and debug issues.
• Knowledge of EMC and its impact on SI/PI.
• Experience working across cross‑functional teams and mentoring junior engineers.
• Strong verbal and written communication skills, able to convey technical findings to diverse audiences.
• Experience in a fast‑paced environment and delivering on tight turnaround times.
• Desire to work as a team with a results‑driven approach.

The base salary range for this role is $111,300–$178,200.

Eligible for discretionary bonus(es) based on financial performance.

Teradyne offers robust health and well‑being benefit programs, including medical, dental, vision, flexible spending accounts, retirement savings plans, life and disability insurance, paid vacation and holidays, tuition assistance and more.

We are an equal‑opportunity employer and value diversity. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure reasonable accommodation for individuals with disabilities to participate in the job application or interview process and to perform job functions.