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RTL Design Engineer AI-Enhanced Mixed-Signal ASICs
Job in
Reading, Middlesex County, Massachusetts, 01814, USA
Listed on 2026-07-26
Listing for:
Semiconductor Engineering
Full Time
position Listed on 2026-07-26
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Test Engineer
Job Description & How to Apply Below
Teradyne’s Silicon Technology Engineering (STE) Digital ASIC Group is seeking an RTL Designer to help develop next generation large Mixed Signal ASICs. You will work with Analog teams and product architects across specification, architecture, design, verification, physical design and silicon bringup, leveraging cutting-edge AI tools to optimize productivity.
You will contribute to RTL design for mission critical blocks, integrate IPs, and collaborate with verification to ensure high-quality
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