FPGA/ASIC Methodology Engineer: Drive Design & Validation
Job in
Reading, Middlesex County, Massachusetts, 01814, USA
Listed on 2026-08-22
Listing for:
Teradyne
Full Time
position Listed on 2026-08-22
Job specializations:
-
Engineering
Job Description & How to Apply Below
Teradyne in North Reading, MA seeks an ASIC/FPGA Methodology Engineer to define, develop, and maintain FPGA/ASIC design and verification workflows. Strong background in FPGA/embedded design and Linux-based tooling is essential for this role.
The candidate will optimize design flows for Vivado/Quartus, collaborate with design and verification teams, and contribute to CI/CD implementation using Jenkins, Docker, and Git. Excellent problem-solving and teamwork are required.
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