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Senior ASIC Verification Lead - SystemVerilog/UVM
Job in
Reading, Middlesex County, Massachusetts, 01814, USA
Listed on 2026-08-30
Listing for:
Teradyne
Full Time
position Listed on 2026-08-30
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Teradyne is seeking a Sr. ASIC Verification Engineer in North Reading, MA to lead verification planning and develop advanced verification environments for complex ASIC/SoC designs.
You will collaborate with design, firmware, software, and validation teams to ensure comprehensive coverage and high-quality outcomes. The role requires 8+ years in ASIC/SoC verification, strong SystemC, C++, System Verilog/UVM experience, and knowledge of functional verification methodologies.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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