Principal SOC Modeling Architect

** Overview*
* Join Microsoft Azures Firmware Center of Excellence to define the future of pre-silicon software development for Microsoft custom silicon. This Principal Modeling Architect is a cross-program technical leader who solves hard system-level problems, establishes scalable architecture and engineering patterns, and then transitions execution ownership to development teams and junior engineers for long-term delivery.

As  
** Principal SOC Modeling Architect,
** you will provide technical leadership across multiple Azure silicon programs. You will drive the architecture and evolution of high-fidelity virtual platforms that enable firmware, operating system, platform development, validation, and silicon bring-up before hardware is available. This is not a single-project implementation role. The expectation is to work across projects, identify and solve the hardest technical problems, prototype and de-risk solutions, establish direction, and then hand off durable execution paths to the broader engineering team.

** Responsibilities*
* ** Why This Role Is Unique*
* + Develop firmware and software before hardware exists.

+ Influence silicon architecture and platform strategy across Azure hardware programs.

+ Solve the organization s hardest modeling, firmware, bring-up, and system integration problems.

+ Work across multiple programs as a trusted technical leader rather than owning only one execution lane.

+ Shape Microsoft s future virtual platform and hybrid development strategy.

+ Build reusable solutions that enable firmware, validation, architecture, and platform teams to move faster.

** Technical Leadership and Strategy*
* + Lead resolution of complex system-level challenges spanning virtual platforms, firmware, silicon architecture, validation infrastructure, software enablement, and hybrid execution environments.

+ Define architectural direction for SystemC/TLM-based virtual platforms supporting multiple generations of Azure silicon.

+ Identify technical risks, technology gaps, and scaling challenges across programs, then drive practical solutions that can be adopted by multiple teams.

+ Establish engineering standards, modeling practices, reusable frameworks, debug strategies, and validation approaches that improve quality and reduce duplicated effort.

** Cross-Program Architecture and Influence*
* + Work across multiple silicon programs as a shared technical leader and subject matter expert.

+ Define reusable platform capabilities across Azure hardware initiatives rather than creating one-off project-specific implementations.

+ Influence silicon architecture, firmware readiness, validation methodologies, and platform bring-up strategy through early technical engagement.

+ Drive alignment across architecture, design verification, firmware, operating system, emulation, prototyping, and platform teams without relying on direct authority.

** Modeling and Firmware Enablement*
* + Design and develop SystemC/TLM-2.0 models for complex SoC subsystems including PCIe, memory, boot infrastructure, compute clusters, interconnect, and platform services.

+ Develop and debug low-level firmware and validation software running on virtual platforms.

+ Support firmware bring-up activities including UEFI, Windows Boot, PCIe initialization, platform enumeration, early driver enablement, and operating system integration.

+ Debug complex interactions spanning hardware, firmware, operating systems, virtualization environments, simulation infrastructure, host systems, and modeling frameworks.

+ Analyze and optimize simulation performance, scalability, usability, and debug productivity across large SoC and multi-SoC environments.

** Hybrid Platform Strategy*
* + Contribute to architectural integration of virtual platforms with emulation and prototyping systems including ZeBu, HAPS, Helium, Palladium, and Protium.

+ Help define Microsoft s long-term hybrid development strategy by combining simulation, emulation, and prototyping technologies to scale pre-silicon software development and validation capacity.

+ Partner with DV, firmware, architecture, and platform teams to determine where virtual models, emulation, FPGA prototyping, and hybrid flows provide the most value.

** Mentorship and Organizational Scale*
* + Mentor engineers through design reviews, architecture guidance, technical coaching, and hands-on problem solving.

+ Prototype, prove, and de-risk complex solutions before transitioning ownership to development teams for long-term execution.

+ Build organizational capability by enabling junior and senior engineers to understand, maintain, and extend solutions after initial architecture direction is established.

+ Raise engineering quality by promoting reusable, maintainable, scalable solutions rather than short-term fixes.

** Qualifications*
* ** Minimum Qualifiations:*
* + Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience

+ OR Master's Degree in Electrical…