Layout Designer – Pathfinding

Responsibilities

• Develop and prepare multi-dimensional layouts and detailed drawings of semiconductor devices
• Verify data integrity and take the lead in major block developments
• Organize and prioritize logistics and resource allocations to meet scheduled deadlines
• Effectively mentor junior team members
• Contribute to the improvement of layout efficiency through automation and new methodologies

• AS or Bachelor's in Electronics, Electrical Engineering, or a related field plus 10 years of direct experience in semiconductor layout design
• Deep working knowledge of EDA tools (i.e. Cadence Virtuoso, Synopsys, Calibre)
• Strong ability to debug problems through root-cause analysis
• Skilled in developing and applying custom layout, floor‑planning, signal‑planning and power‑planning methodologies
• Strong verbal and written communication skills
• In‑depth understanding of design rules and delivering quality layouts
• Strong physical verification analysis and debugging skills