SoC Design Verification Engineer

SoC Design Verification Engineer page is loaded## SoC Design Verification Engineer locations:
Richardson time type:
Full time posted on:
Posted Todayjob requisition :
JR-2600186
** About Global Foundries:
** Global Foundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, Global Foundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit
** Summary of Role:
** Seeking a Senior System-on-Chip Design Verification engineer to verify the High-Performance Automotive Microcontrollers. The candidate will be responsible for contributing to all phases of the verification lifecycle, including reviewing specifications, developing testbench architecture, creating testplans, defining and closing coverage, and debugging failing simulations.

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* Essential Responsibilities:

*** Hands-on development of test benches, testcases and checkers to exercise and measure design behavior against specified intent.
* Debug differences in simulated behavior of designs and design specifications.
* Contribute to the development of DV flows and methodology for improved development efficiency.
* Independently manage verification tasks while mentoring junior team members.
* Collaborate with cross-functional teams (Spec, Design, etc) to resolve bugs.
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* Other Responsibilities:

*** Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
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* Required Qualifications:

*** Bachelor’s degree in Electrical/Computer Engineering, Computer Science, or related field
* 5-8 years of experience in SoC verification.
* Expertise in writing tests using System Verilog, UVM and

C.
* Experience with scripting languages like Python, Tcl/Tk, Perl.
* Understanding of SOC interconnects and bus standards such as AXI, AHB, APB.
* Excellent analytical and problem-solving skills.
* Proven written and verbal technical communication skills.
* Self-motivated, collaborative team player able to broadly contribute project goals.
* Innovative approach to improving existing processes and methodologies.
** Preferred Qualifications
*** Master’s degree in Electrical/Computer Engineering, Computer Science, or related field
* Experience with RISC-V, ARM and/or MIPS CPU architectures.
* Knowledge of register description languages (IP-XACT, System

RDL, UVM RAL).
* Familiarity with Functional Safety standards (ISO 26262) and fault injection methodologies.
* Background with power-aware (UPF) and gate-level simulations (GLS)
* Familiarity of formal verification tools and techniques.
** Expected Salary Range**$ - $The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at  and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with Global Foundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

Global Foundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. Global Foundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law
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