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Principal Digital Designer, HIG HBM

Job in Richardson, Dallas County, Texas, 75080, USA
Listing for: Micron Technology
Full Time position
Listed on 2026-05-16
Job specializations:
  • Engineering
    Software Engineer, Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a Principal HBM RTL Designer, you will serve as a technical leader driving the front‑end digital design of next‑generation High Bandwidth Memory (HBM) products. This role requires deep expertise in RTL architecture, build methodology, and multi‑functional technical leadership. You will own complex design blocks end‑to‑end—from architectural definition through production‑quality implementation—while mentoring engineers, influencing design strategy, and ensuring world‑class design execution.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. Micron offers a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.

Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the benefit programs available, please see the Benefits Guide posted on

Responsibilities
  • Define, architect, and lead the development of advanced RTL blocks for HBM subsystems, ensuring alignment with product requirements and architectural goals.
  • Own end‑to‑end front‑end design, including micro‑architecture, RTL development, simulation strategy, and design quality.
  • Drive technical decisions across circuit development, synthesis, constraints, and physical‑design integration, ensuring timing, power, and area compliance.
  • Champion design methodologies, develop reusable frameworks, and improve RTL design flows, validation strategies, and sign‑off processes.
  • Collaborate closely with physical design, verification, architecture, and product engineering to integrate subsystems and deliver high‑quality silicon.
  • Lead root‑cause analysis and corrective actions for complex design issues, ensuring long‑term design robustness.
  • Communicate effectively at all levels, contributing to technical planning, project execution, and cross‑organizational alignment.
Minimum Qualifications
  • Bachelor’s degree with 9+ years of proven experience, or Master’s degree with 7+ years of proven experience in digital development and RTL development.
  • Expert‑level knowledge of front‑end digital design, RTL coding, micro‑architecture, and system integration.
  • Deep understanding of timing closure, power optimization, area trade‑offs, and system‑level complexity management.
  • Strong experience with synthesis, STA, constraints, LEC, Lint, CDC, and front‑end sign‑off methodologies.
  • Proven ability to lead technical teams, mentor engineers, and influence build direction across large programs.
  • Exceptional problem‑solving, analytical, communication, and technical leadership skills.
Preferred Qualifications
  • Experience with UPF, power‑intent development, power analysis, DFT/scan insertion, ATPG, and timing model generation.
  • Proficiency in Python, Perl, or scripting to automate and improve design flows.
  • Familiarity with sophisticated place‑and‑route tools and back‑end requirements for successful RTL‑to‑GDS integration.
  • Proven history delivering high‑complexity systems, preferably in memory, high‑speed I/O, or compute‑intensive ASIC builds.
  • Ability to define architectural trade‑offs, influence product direction, and guide teams toward scalable and maintainable build solutions.
Equal Opportunity Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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