Director, HBM RTL Design and Integration
Listed on 2026-06-03
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Engineering
Systems Engineer
Overview
Director, HBM RTL Design and Integration at Micron Technology. Lead a team responsible for the design, integration, and delivery of next-generation HBM SoC logic die, focusing on RTL development and IP integration. Drive technical strategy across multiple product generations, working closely with architecture, verification, physical design, firmware, and product engineering teams.
Key Responsibilities- Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP integration, and SoC-level design convergence.
- Drive translation of architectural and micro‑architectural specifications into robust, high‑quality RTL implementations across multiple teams.
- Oversee SoC integration aspects: clocking, reset, power intent, configuration infrastructure, and system‑level design correctness.
- Establish design methodologies and best practices to improve quality, reuse, and development efficiency across HBM programs.
- Partner with architecture, verification, physical design, firmware, and system teams to ensure successful end‑to‑end product execution.
- Work closely with product engineering, test, probe, process integration, assembly, and manufacturing to ensure robust, manufacturable HBM solutions.
- Drive trade‑offs among performance, power, area, schedule, and risk to ensure optimal product outcomes.
- Build, lead, and scale a high‑performing RTL design and integration team, including recruiting, mentoring, and retaining top engineering talent.
- Proven experience leading large‑scale SoC design teams delivering complex SoCs to advanced process nodes (e.g., TSMC).
- Deep expertise in RTL design, SoC integration, and full RTL‑to‑GDS flows, including synthesis, timing, and signoff considerations.
- Strong experience integrating complex IP subsystems (controllers, NOC, microcontrollers, PHY‑adjacent logic, RAS, MBIST, interfaces).
- Familiarity with EDA tools and scripting languages (e.g., System Verilog, Python, TCL).
- Knowledge of DRAM/HBM systems and JEDEC standards preferred.
- 15+ years of relevant SoC design experience with increasing scope and technical leadership.
- Demonstrated success driving multiple tape‑outs and cross‑functional SoC programs.
- Strong leadership, communication, and organizational influence skills.
- Experience building and managing global engineering teams.
US base salary range: $ – $ a year. Additional compensation may include benefits, bonuses, and equity.
BenefitsMicron offers medical, dental, and vision plans, paid time‑off, paid holidays, and a robust paid time‑off program. Benefit programs help protect income if unable to work due to illness or injury and provide paid family leave.
Equal OpportunityMicron is an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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