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Principal Layout Designer, AI-Optimized Memory

Job in Richardson, Dallas County, Texas, 75080, USA
Listing for: Relha LLC
Full Time position
Listed on 2026-06-12
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Hardware Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below
Position: Staff/Principal Layout Designer, AI-Optimized Memory

Staff/Principal Layout Designer, AI-Optimized Memory

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a Principal Layout Designer in the AI‑Optimized Architecture team, you will drive DRAM layout activities for tightly coupled, high‑performance memory for AI workloads. Apply expert knowledge to deliver high‑quality layout designs across analog, mixed‑signal, and custom digital domains in collaboration with peer architecture, design, and packaging teams. Drive layout designs for early architecture concepts to demonstrate feasibility and identify optimizations.

Responsibilities
  • Design and develop critical analog, mixed‑signal, and custom digital blocks.
  • Drive exploratory layout processes for next‑generation architectures, including floor planning, placement, and routing.
  • Integrate full chip designs and perform layout verification (LVS, DRC), quality checks, and documentation.
  • Collaborate and communicate across domains, including signal integrity, architecture, design, and sophisticated packaging, to ensure successful architecture exploration.
Minimum Qualifications
  • Demonstrated ability with a Bachelor's or Master's in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience.
  • Extensive hands‑on layout experience with critical DRAM blocks and full designs.
  • Experience with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS.
  • Solid understanding of layout impacts: speed, capacitance, power, and area.
  • Strong understanding of analog layout fundamentals: matching, electro migration, latch‑up, coupling, crosstalk, IR‑drop, and parasitic effects.
Preferred Qualification
  • 10+ years of experience in analog and custom layout designs.
  • Proven layout ability with advanced CMOS processes across technology nodes (e.g., FinFET).
  • Excellent communication and interpersonal skills.

The US base salary range that Micron Technology estimates it could pay for this full‑time position is:

Additional compensation may include benefits, bonuses, and equity.

Benefits
  • Choice of medical, dental, and vision plans in all locations.
  • Benefit programs that help protect your income if you are unable to work due to illness or injury.
  • Paid family leave.
  • Robust paid time‑off program and paid holidays.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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