SoC Architecture and Design Engineer, Senior Member of Technical Staff; SMTS

SoC Architecture and Design Engineer, Senior Member of Technical Staff (SMTS)

As a SoC Architecture and Design Engineer you will be part of the Heterogeneous Integration Group (HIG), contributing to the architecture, design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, design, verification, physical design, firmware and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area and schedule targets.

• Architect, design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die.
• Architect and design memory sub‑systems including memory IP selection and integration, bus and protocol selection, and power/performance/area optimization.
• Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic).
• Translate architectural and micro‑architectural specifications into high‑quality RTL implementations.
• Participate in SoC‑level integration activities, including clocking, reset, power intent and configuration infrastructure.
• Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues.
• Contribute to design documentation, block specifications and design reviews.
• Collaborate multi‑functionally with Product Engineering, Test, Probe, Process Integration and Manufacturing to ensure robust and manufacturable builds.

• Bachelor’s or master’s degree in electrical engineering, computer engineering or a related field, with a minimum of 15 years of experience.
• Proficiency in System Verilog/Verilog and familiarity with SoC integration methodologies.
• Experience with the RTL‑to‑GDS flow, including synthesis, static timing analysis and sign‑off considerations.
• Familiarity with EDA tools from Cadence, Synopsys and/or Siemens.
• Programming or scripting experience (e.g., Python, TCL, Perl or shell scripting).

• Experience with HBM, DRAM or memory‑centric SoC designs.
• Familiarity with high‑speed interfaces, clocking strategies, reset architectures and power management concepts.
• Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug.
• Experience with hardware emulation or acceleration platforms (e.g., Palladium, Veloce, Zebu).

Systems Design Engineering MTS – Systems Design Engineering SMTS

TBD

US base salary range: $ – $ a year. Additional compensation may include benefits, bonuses and equity. Micron offers a choice of medical, dental and vision plans, income protection, paid family leave, a robust paid time‑off program and paid holidays.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state or local laws.